Difference between revisions of "SMPC"
From Yabause
(Added some information from CM's document. Still missing the direct I/O, etc. stuff. It almost needs to be reworked or put on a separate page consider the size of the section.) |
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|OREG31 | |OREG31 | ||
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+ | |||
+ | ==I/O Ports== | ||
+ | |||
+ | The Saturn has two 7-bit I/O ports. Here's a diagram of the port itself and a list of pin assignments. The names on the left are the Sega Genesis style naming conventions. | ||
+ | |||
+ | Left Right | ||
+ | .-----------------. | ||
+ | | 1 2 3 4 5 6 7 8 9 | | ||
+ | +-=-=-=-=-=-=-=-=-=-+ | ||
+ | |||
+ | Pin 1 - +5v | ||
+ | Pin 2 - D2 (Left) | ||
+ | Pin 3 - D3 (Right) | ||
+ | Pin 4 - D4 (TL) | ||
+ | Pin 5 - D5 (TR) | ||
+ | Pin 6 - D6 (TH) | ||
+ | Pin 7 - D0 (Up) | ||
+ | Pin 8 - D1 (Down) | ||
+ | Pin 9 - Ground | ||
Revision as of 05:58, 18 September 2010
The SMPC (System Management & Peripheral Control) is a Hitachi 4-bit MCU with built-in program ROM. The actual part number is HD404920FS, but the chip is branded with a Sega custom part number of 315-5744.
Tasks
The SMPC carries out the following tasks:
- Turn on/off other parts of the system. (CPU's, custom chips, etc.) - Maintain internal timekeeping functions. - Change the system clock speed generated by the PLL. - Poll peripherals in the I/O ports. - Provide SH-2 interface to I/O ports for direct programming.
The SMPC is battery backed, and earlier models of the Saturn have a button in the battery compartment to force a SMPC reset.
Memory map
Address | Name | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | What's there |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0x20100001 | IREG0 | Input registers for command issuing. Whatever data the SMPC needs for processing command goes here. | ||||||||||||||||
0x20100003 | IREG1 | See IREG0 | ||||||||||||||||
0x20100005 | IREG2 | See IREG0 | ||||||||||||||||
0x20100007 | IREG3 | See IREG0 | ||||||||||||||||
0x20100009 | IREG4 | See IREG0 | ||||||||||||||||
0x2010000B | IREG5 | See IREG0 | ||||||||||||||||
0x2010000D | IREG6 | See IREG0 | ||||||||||||||||
0x2010001F | COMREG | The command that's supposed to be issued by the SMPC | ||||||||||||||||
0x20100021 | OREG0 | Ouput Register for the command. If it supports it, it'll output any return data here | ||||||||||||||||
0x20100023 | OREG1 | See OREG0 | ||||||||||||||||
0x20100025 | OREG2 | See OREG0 | ||||||||||||||||
0x20100027 | OREG3 | See OREG0 | ||||||||||||||||
0x20100029 | OREG4 | See OREG0 | ||||||||||||||||
0x2010002B | OREG5 | See OREG0 | ||||||||||||||||
0x2010002D | OREG6 | See OREG0 | ||||||||||||||||
0x2010002F | OREG7 | See OREG0 | ||||||||||||||||
0x20100031 | OREG8 | See OREG0 | ||||||||||||||||
0x20100033 | OREG9 | See OREG0 | ||||||||||||||||
0x20100035 | OREG10 | See OREG0 | ||||||||||||||||
0x20100037 | OREG11 | See OREG0 | ||||||||||||||||
0x20100039 | OREG12 | See OREG0 | ||||||||||||||||
0x2010003B | OREG13 | See OREG0 | ||||||||||||||||
0x2010003D | OREG14 | See OREG0 | ||||||||||||||||
0x2010003F | OREG15 | See OREG0 | ||||||||||||||||
0x20100041 | OREG16 | See OREG0 | ||||||||||||||||
0x20100043 | OREG17 | See OREG0 | ||||||||||||||||
0x20100045 | OREG18 | See OREG0 | ||||||||||||||||
0x20100047 | OREG19 | See OREG0 | ||||||||||||||||
0x20100049 | OREG20 | See OREG0 | ||||||||||||||||
0x2010004B | OREG21 | See OREG0 | ||||||||||||||||
0x2010004D | OREG22 | See OREG0 | ||||||||||||||||
0x2010004F | OREG23 | See OREG0 | ||||||||||||||||
0x20100051 | OREG24 | See OREG0 | ||||||||||||||||
0x20100053 | OREG25 | See OREG0 | ||||||||||||||||
0x20100055 | OREG26 | See OREG0 | ||||||||||||||||
0x20100057 | OREG27 | See OREG0 | ||||||||||||||||
0x20100059 | OREG28 | See OREG0 | ||||||||||||||||
0x2010005B | OREG29 | See OREG0 | ||||||||||||||||
0x2010005D | OREG30 | See OREG0 | ||||||||||||||||
0x2010005F | OREG31 | See OREG0 | ||||||||||||||||
0x20100061 | SR | Status Register | ||||||||||||||||
0x20100063 | SF | Status Flag. Shows the status of the SMPC command. Normally you set this to 1 when issuing out a command, and then the SMPC clears it when it's finished. | ||||||||||||||||
0x20100075 | PDR1 | Port Data Register for Port 1. | ||||||||||||||||
0x20100077 | PDR2 | Port Data Register for Port 2. | ||||||||||||||||
0x20100079 | DDR1 | Data Direction Register for Port 1. Controls direction of each bit in PDR(they can either be read or write). | ||||||||||||||||
0x2010007B | DDR2 | Data Direction Register for Port 2. See DDR1. | ||||||||||||||||
0x2010007D | IOSEL | Input/Output Select Register. Use this to control whether the SMPC automatically polls the peripheral port or whether it's done manually through the DDR/PDR registers | ||||||||||||||||
0x2010007F | EXLE | External Latch Enable Register. Enables input from the VDP2 external latch or peripheral data bit 6 to trigger SCU Pad interrupt. |
Commands
Command | Value | Description | Input registers | Output registers |
---|---|---|---|---|
MSHON | 0x0 | Resets and enables the SH-2 Master CPU. | None | OREG31 |
SSHON | 0x2 | Resets and enables the SH-2 Slave CPU. | None | OREG31 |
SSHOFF | 0x3 | Disables the SH-2 Slave CPU. | None | OREG31 |
SNDON | 0x6 | Resets and enables the Motorola C68K (sound) CPU. | None | OREG31 |
SNDOFF | 0x7 | Disables the Motorola C68K (sound) CPU. | None | OREG31 |
CDON | 0x8 | Resets and enables the CD Block. | None | OREG31 |
CDOFF | 0x9 | Disables the CD Block. | None | OREG31 |
NETLINKON | 0xA | Resets and enables Netlink execution. | None | OREG31 |
NETLINKOFF | 0xB | Disables Netlink execution. | None | OREG31 |
SYSRES | 0xD | Resets the System. | None | OREG31 |
CKCHG352 | 0xE | Changes the system clockspeed | None | OREG31 |
CKCHG320 | 0xF | Changes the system clockspeed | None | OREG31 |
INTBACK | 0x10 | Fetches the SMPC status and peripheral data. | IREG0~IREG2 | OREG0~OREG31 |
SETTIME | 0x16 | Sets the date and time for the RTC | IREG0~IREG6 | OREG31 |
SETSMEM | 0x17 | Sets the 4-byte battery-backed memory contained on the SMPC(which is used by the bios for language settings, etc. | IREG0~IREG3 | OREG31 |
NMIREQ | 0x18 | Sends an NMI request to the Master SH2 | None | OREG31 |
RESENAB | 0x19 | Enables NMI requests to be sent when the Reset button is pressed. | None | OREG31 |
RESDISA | 0x1A | Disables NMI requests to be sent when the Reset button is pressed. | None | OREG31 |
I/O Ports
The Saturn has two 7-bit I/O ports. Here's a diagram of the port itself and a list of pin assignments. The names on the left are the Sega Genesis style naming conventions.
Left Right .-----------------. | 1 2 3 4 5 6 7 8 9 | +-=-=-=-=-=-=-=-=-=-+
Pin 1 - +5v Pin 2 - D2 (Left) Pin 3 - D3 (Right) Pin 4 - D4 (TL) Pin 5 - D5 (TR) Pin 6 - D6 (TH) Pin 7 - D0 (Up) Pin 8 - D1 (Down) Pin 9 - Ground
SMPC Control Mode
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SH-2 Direct Mode
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